著作管理系統
發表年月： 從 年 到 年
匯出:Excel格式



期刊論文
  1. Slo-Li Chu; Kazuhiro Sudo; Hideo Yokota; Kuniya Abe; Yukio Nakamura; Ming-Dar Tsai , “Human induced pluripotent stem cell formation and morphology prediction during reprogramming with time-lapse bright-field microscopy images using deep learning methods” , 2023 , Computer Methods and Programs in Biomedicine , vol.229. , p.1-13. (SCI期刊)
  2. Slo-Li Chu; Kuniya Abe; Hideo Yokota; Ming-Dar Tsai , “Recurrent Neural Network For Monitoring Mouse Embryonic Stem Cell Colony In Vitro Using Time-Lapse Fluorescence Microscopy Images” , 2022 , Biomedical Engineering - Applications, Basis and Communications , vol.34 , p.2250030-1-11. (EI期刊)
  3. Slo-Li Chu; Chien-Fang Chen; Yu-Chen Zheng , “CFSM: a novel frame analyzing mechanism for real-time face recognition system on the embedded system” , 2022 , Multimedia Tools and Applications , vol.81 , p.1867-1891. (EI期刊)(SCI期刊)
  4. Y.-H. Chang; H. Yokota; K. Abe; M.-D. Tasi; S.-L. Chu , “Automatic three dimensional segmentation of mouse embryonic stem cell nuclei by utilising multiple channels of confocal fluorescence images” , 2021 , Journal of Microscopy , vol.281 , p.57-75. (SCI期刊)
  5. Chih-Chieh Hsiao, Min-Jen Lo, Slo-Li Chu , “Demand Look-Ahead Memory Access Scheduling for 3D Graphics Processing Units” , 2014 , Multimedia Tools and Applications , vol.73 , p.1391-1416. (EI期刊)(SCI期刊)
  6. Chih-Chieh Hsiao; Slo-Li Chu; Chiu-Cheng Hsieh , “An Adaptive Thread Scheduling Mechanism with Low-Power Register File for Mobile GPUs” , 2014 , IEEE Transactions on Multimedia , vol.16 , p.60-67. (EI期刊)(SCI期刊)
  7. Slo-Li Chu, Chih-Chieh Hsiao , “Optimising Space Exploration of OpenCL for GPGPUs” , 2014 , International Journal of Computational Science and Engineering , vol.9 , p.64-79. (EI期刊)
  8. Slo-Li Chu; Chih-Chieh Hsiao; Chen-Yu Chen , “Program-Based Dynamic Precision Selection Framework with a Dual-Mode Unified Shader for Mobile GPUs” , 2013 , Computers & Electrical Engineering , vol.39 , p.2183-2196. (EI期刊)(SCI期刊)
  9. Chih-Chieh Hsiao; Slo-Li Chu; Chen-Yu Chen , “Energy-Aware Hybrid Precision Selection Framework for Mobile GPUs” , 2013 , Computers & Graphics , vol.37 , p.431-444. (EI期刊)(SCI期刊)
  10. Slo-Li Chu; Min-Jen Lo , “A New Design Methodology for Composing Complex Digital Systems” , 2013 , Journal of Applied Research and Technology , vol.11 , p.195-205. (SCI期刊)
  11. Slo-Li Chu, Geng-Siao Li, and Ren-Quan Liu , “DynaPack: A Dynamic Scheduling Hardware Mechanism for a VLIW Processor” , 2012 , Applied Mathematics & Information Sciences , vol.6 , p.983-991. (SCI期刊)
  12. Slo-Li Chu, Chih-Chieh Hsiao, Chiu-Cheng Hsieh , “Demand-Driven Register File for Multithreaded Mobile GPUs” , 2012 , IEICE Electronics Express , vol.9 , p.1562-1567. (EI期刊)(SCI期刊)
  13. Slo-Li Chu, Geng-Siao Li, Ting-Xuan Wu , “Anello: a New Multicore Interconnection Network for 64-cores Architecture by Using Synthesizable Verilog HDL” , 2012 , Journal of Advanced Engineering , vol.7 , p.193-202.
  14. Slo-Li Chu, Chih-Chieh Hsiao , “Optimizing Techniques for OpenCL Programs on Heterogeneous Platforms” , 2012 , International Journal of Grid and High Performance Computing , vol.4 , p.48-62. (EI期刊)
  15. Slo-Li Chu, Min-Jen Lo , “Design a High-Performance Memory Controller for a Multimedia SOC” , 2012 , PRZEGLAD ELEKTROTECHNICZNY (Electrical Review) , vol.88 , p.353-356. (SCI期刊)
  16. Slo-Li Chu; Chao-Chieh Hsu; Geng-Siao Li , “Nymph: A Novel 32-Cores Multicore Processor Designed by Synthesizable Verilog HDL” , 2011 , Journal of Advanced Engineering , vol.6 , p.277-286.
  17. Slo-Li Chu; Geng-Siao Li; Fang-Chen Liau; Yu-Ku Chen , “Design a MIPS R2000 Processor with its Corresponding SW/HW Co-Verification Environment” , 2010 , Journal of Advanced Engineering , vol.5 , p.331-340.
  18. Slo-Li Chu; Jiun-You Chen; Yi-Jyun Wang; Jung-Lung Lee , “Design of an IEEE 754 Floating-Point Arithmetic Unit for Embedded Systems;” , 2010 , Journal of Advanced Engineering , vol.5 , p.185-193.
  19. Slo-Li Chu , “An Energy Reduction Scheduling Mechanism for a High-Performance SoC Architecture” , 2005 , Lecture Notes in Computer Science , vol.3824 , p.281-290. (EI期刊)(SCI期刊)
  20. Slo-Li Chu, Tsung-Chuan Huang, Lan-Chi Lee , “Improving Workload Balance and Code Optimization on Processor-in-Memory Systems” , 2004 , Journal of Systems and Software , vol.71 , p.71-82. (EI期刊)(SCI期刊)
  21. Slo-Li Chu , “SBATCH: An Integrated Statement-Based Parallelizing Compiler for Tightly-Coupled Heterogeneous Environments” , 2004 , Chung Yuan Journal , vol.32 , p.91-101.
  22. Slo-Li Chu, Tsung-Chuan Huang , “SAGE: An Automatic Analyzing System for a New High-Performance SoC Architecture––Processor-in-Memory; ” , 2004 , Journal of Systems Architecture , vol.50 , p.1-15. (EI期刊)(SCI期刊)
  23. Tsung-Chuan Huang, Slo-Li Chu , “A Statement Based Parallelizing Framework for Processor-in-Memory Architectures” , 2003 , Information Processing Letters , vol.85 , p.159-163. (EI期刊)(SCI期刊)
  24. Tsung-Chuan Huang, Slo-Li Chu , “SAGE: A New Analysis and Optimization System for FlexRAM Architecture” , 2001 , Lecture Notes in Computer Science , vol.2107 , p.160-168. (EI期刊)(SCI期刊)
研討會論文
  1. Slo-Li Chu; Kazuhiro Sudo; Kuniya Abe; Hideo Yokota; Yukio Nakamura; Guan-Ting Liou; Ming-Dar Tsai , “Prediction of Human Induced Pluripotent Stem Cell Formation Based on Deep Learning Analyses Using Time-lapse Brightfield Microscopy Images” , 2022 , 2022 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC) , 2022 /7 /11 ~ 2022 /7 /15 , United Kingdom .
  2. Slo-Li Chu; Hideo Yokota; Kuniya Abe; Dooseon Cho; Ming-Dar Tsai , “U-net structures for segmentation of single mouse embryonic stem cells using three-dimensional confocal microscopy images” , 2022 , 2022 44th Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC) , 2022 /7 /11 ~ 2022 /7 /15 , United Kingdom .
  3. Slo-Li Chu; Kuniya Abe; Hideo Yokota; Dooseon Cho; Yuan-Hao Chen; Ming-Dar Tsai , “High Resolution U-Net for Quantitatively Analyzing Early Spatial Patterning of Human Induced Pluripotent Stem Cells on Micropatterns” , 2021 , 2021 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC) , 2021 /11 /1 ~ 2021 /11 /5 , Mexico .
  4. Slo-Li Chu; Shao-Yu Sung; Ming-Dar Tsai; Kuniya Abe; Kazuhiro Sudo; Yukio Nakamura; Hideo Yokota , “Trend Training Based RNN for Human Induced Pluripotent Stem Cell Reprogramming Prediction Using Time-Lapse Microscopy Images” , 2020 , 2020 IEEE 20th International Conference on Bioinformatics and Bioengineering (BIBE) , 2020 /10 /26 ~ 2020 /10 /28 , United States .
  5. Slo-Li Chu; Li-Yu Lin; Ming-Dar Tsai; Kuniya Abe; Kazuhiro Sudo; Yukio Nakamura; Hideo Yokota , “CNN Based iPS Cell Formation Stage Classifier for Human iPS Cell Growth Status Prediction Using Time-lapse Microscopy Images” , 2020 , 2020 IEEE 20th International Conference on Bioinformatics and Bioengineering (BIBE) , 2020 /10 /26 ~ 2020 /10 /28 , United States .
  6. Slo-Li Chu; Kuniya Abe; Hideo Yokota; Kazuhiro Sudo; Yukio Nakamura; Yuan-Hsiang Chang; Liang-Che Fang; Ming-Dar Tsai , “Prediction for Morphology and States of Stem Cell Colonies using a LSTM Network with Progressive Training Microscopy Images” , 2020 , 2020 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC) , 2020 /7 /20 ~ 2020 /7 /24 , Canada .
  7. Slo-Li Chu; Cheng-Hsien Tsai , “A Novel Training Mechanism for Extending Convolutional Neural Network” , 2020 , 12th International Conference on Machine Learning and Computing (ICMLC) , 2020 /2 /15 ~ 2020 /2 /17 , 大陸地區 .
  8. Slo-Li Chu; Wen-Chih Ho; Yi-Jie Jiang , “Improving the Performance of Collective Communication for the On-Chip Network” , 2019 , 10th International Symposium on Parallel Architectures, Algorithms and Programming (PAAP) , 2019 /12 /12 ~ 2019 /12 /14 , 大陸地區 .
  9. Yuan-Hsiang Chang; Kuniya Abe; Hideo Yokota; Kazuhiro Sudo; Yukio Nakamura; Slo-Li Chu; Chih-Yung Hsu; Ming-Dar Tsai , “Human Induced Pluripotent Stem Cell Reprogramming Prediction in Microscopy Images using LSTM based RNN” , 2019 , 2019 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC) , 2019 /7 /23 ~ 2019 /7 /27 , Federal Republic of Germany .
  10. Slo-Li Chu; Wen-Chih Ho; Chien-Fang Chen; Kai-Wei Ceng; Ming-Han Liu , “Design a Novel Memory Network for Processor-in-Memory Architectures” , 2017 , The 13th International Conference on Semantics, Knowledge and Grids , 2017 /8 /13 ~ 2017 /8 /14 , 大陸地區 .
  11. Slo-Li Chu; Sheng-Jie Shu; Ching-Chung Chen; Ching-Jung Chen , “Camellia: A Novel High Performance On-Chip Network for Multicore Architectures” , 2015 , 2015 11th International Conference on Semantics, Knowledge and Grids , 2015 /8 /19 ~ 2015 /8 /21 , 大陸地區 .
  12. Slo-Li Chu; Geng-Siao Lee; Yan-Wun Peng , “Self Similar Cubic: A Novel Interconnection Network for Many-Core Architectures” , 2012 , 2012 Fifth International Symposium on Parallel Architectures, Algorithms and Programming , 2012 /12 /17 ~ 2012 /12 /20 , 中華民國 台灣 .
  13. Chih-Chieh Hsiao; Slo-Li Chu , “A Hierarchical Triangle-Level Culling Technique for Tile-Based Rendering” , 2012 , 2012 Fifth International Symposium on Parallel Architectures, Algorithms and Programming , 2012 /12 /17 ~ 2012 /12 /20 , 中華民國 台灣 .
  14. Slo-Li Chu; Shiue-Ru Chen; Sheng-Fu Weng , “Design a Low-Power Scheduling Mechanism for a Multicore Android System” , 2012 , 2012 Fifth International Symposium on Parallel Architectures, Algorithms and Programming , 2012 /12 /17 ~ 2012 /12 /20 , 中華民國 台灣 .
  15. Chih-Chieh Hsiao, Slo-Li Chu, Shang-Shun Dai , “Efficient Rendering and Cache Replacement Mechanisms for Hierarchical Tiling in Mobile GPUs” , 2012 , 2012 IEEE Global High Tech Congress on Electronics , 2012 /11 /18 ~ 2012 /11 /20 , 大陸地區 .
  16. Slo-Li Chu; Geng-Siao Li; Ren-Quan Liu , “Avalon: A Quad-Issue MIPS32 VLIW Processor with Dynamic Scheduling Mechanism” , 2012 , 2012 2nd International Conference on Computer Science and Information Engineering , 2012 /5 /19 ~ 2012 /5 /20 , 大陸地區 .
  17. Cheng-Liang Lin; Yi-Hsuan Hung; Huan-Yi Chen; Slo-Li Chu , “Content-aware smart remote control for Android-based TV” , 2012 , 2012 IEEE International Conference on Consumer Electronics(ICCE) , 2012 /1 /13 ~ 2012 /1 /16 , United States .
  18. Slo-Li Chu; Shiue-Ru Chen , “Speedup Resilience: A Practical Metric to Explore the Performance Boundary of Multicore Architectures” , 2011 , Proceedings of 2011 International Conference on Mechanical Engineering and Technology (ICMET 2011) , 2011 /11 /24 ~ 2011 /11 /25 , United Kingdom .
  19. Slo-Li Chu; Chih-Chieh Hsiao; Chiu-Cheng Hsieh , “An Energy-Efficient Unified Register File for Mobile GPUs” , 2011 , 9th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2011) , 2011 /10 /24 ~ 2011 /10 /26 , Australia .
  20. Slo-Li Chu; Chih-Chieh Hsiao; Chen-Yu Chen , “A Dual-Mode Unified Shader with Frame-based Dynamic Precision Adjustment for Mobile GPUs” , 2011 , 9th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2011) , 2011 /10 /24 ~ 2011 /10 /26 , Australia .
  21. Slo-Li Chu; Chih-Chieh Hsiao , “OpenCL: Make Ubiquitous Supercomputing Possible” , 2010 , 2010 12th IEEE International Conference on High Performance Computing and Communications (HPCC 2010) , 2010 /9 /1 ~ 2010 /9 /3 , Australia .
  22. Slo-Li Chu; Chih-Nan Hsu; Geng-Siao Li , “Design a Fully MIPS32 ISA Processor with Corresponding Verification Environment” , 2009 , 2009 National Computer Symposium , 2009 /11 /27 ~ 2009 /11 /28 , 中華民國 台灣 .
  23. Slo-Li Chu, Chih-Chieh Hsiao, Pin-Hua Chiu , “Design a Hardware Mechanism to Utilize Multiprocessors on a Uni-processor Operating System” , 2009 , 9th International Conference Algorithms and Architectures for Parallel Processing , 2009 /6 /8 ~ 2009 /6 /11 , 中華民國 台灣 .
  24. Slo-Li Chu; Min-Jen Lo; Hsiao-Wen Yang , “MediaMem: A dynamically adjustable memory subsystem for high-bandwidth required multimedia SoC systems” , 2008 , 2008. 13th Asia-Pacific Computer Systems Architecture Conference , 2008 /8 /4 ~ 2008 /8 /6 , 中華民國 台灣 .
  25. Slo-Li Chu , “Toward to Utilize the Heterogeneous Multiple Processors of the Chip Multiprocessor Architecture” , 2007 , International Conference on Embedded and Ubiquitous Computing , 2007 /12 /17 ~ 2007 /12 /20 , 中華民國 台灣 .
  26. Slo-Li Chu , “Critical Block Scheduling: a Thread-Level Parallelizing Mechanism for a Heterogeneous Chip Multiprocessor Architecture” , 2007 , 20th Workshops on Languages and Compilers for Parallel Computing , 2007 /10 /11 ~ 2007 /10 /13 , United States .
  27. Slo-Li Chu, Chih-Chieh Hsiao, Pin-Hua Chiu, Hsien-Chang Lin , “Design a Hardware Interprocessor Communication Mechanism for a Multi-core Computer System” , 2007 , 18th VLSI Design/CAD Symposium , 2007 /8 /7 ~ 2007 /8 /10 , 中華民國 台灣 .
  28. Slo-Li Chu , “Design a Novel Low Power Scheduling Mechanism for a High Performance MPSoC Architecture” , 2006 , 12th Workshop on Compiler Techniques for High-Performance Computing , 2006 /3 /16 ~ 2006 /3 /17 , 中華民國 台灣 .
  29. Slo-Li Chu , “POERS: A Performance-Oriented Energy Reduction Scheduling Technique for a High-Performance MPSoC Architecture” , 2005 , 11th International Conference on Parallel and Distributed Systems , 2005 /7 /20 ~ 2005 /7 /22 , Japan .
  30. Slo-Li Chu , “Design a Program Scheduling Mechanism for Reducing Energy Consumption on a MPSoC Architecture” , 2005 , Eleventh Workshop on Compiler Techniques for High-Performance Computing , 2005 /3 /17 ~ 2005 /3 /18 , 中華民國 台灣 .
  31. Slo-Li Chu , “PSS: a novel statement scheduling mechanism for a high-performance SoC architecture” , 2004 , Tenth International Conference on Parallel and Distributed Systems , 2004 /7 /7 ~ 2004 /7 /9 , United States .
  32. Slo-Li Chu, Tsung-Chuan Huang , “A New Code Scheduling Mechanism for a Processor-in-Memory Architecture” , 2004 , The Tenth Workshop on Compiler Techniques for High-Performance Computing , 2004 /3 /18 ~ 2004 /3 /19 , 中華民國 台灣 .
  33. Slo-Li Chu, Tsung-Chuan Huang , “Exploiting Application Parallelism for Processor-in-Memory Architecture” , 2003 , National Computer Symposium (NCS 2003) , 2003 /12 /18 ~ 2003 /12 /19 , 中華民國 台灣 .
  34. Tsung-Chuan Huang, Slo-Li Chu, Yu-Wen Shu , “A List-based Low Power Scheduling Technique for Intelligent Memory System” , 2003 , The Second International Conference on Information and Management Sciences , 2003 /8 /24 ~ 2003 /8 /30 , 大陸地區 .
  35. Slo-Li Chu, Tsung-Chuan Huang , “ SAGE: An Automatic Analyzing System for a New High-Performance SoC Architecture -- Processor-in-Memory” , 2003 , The Ninth Workshop on Compiler Techniques for High-Performance Computing , 2003 /3 /19 ~ 2003 /3 /21 , 中華民國 台灣 .
  36. Slo-Li Chu, Tsung-Chuan Huang, Lan-Chi Lee , “Several Optimizing Schemes for Processor-in-Memory Architectures” , 2002 , Eighth Workshop on Compiler Techniques for High-Performance Computing , 2002 /3 /14 ~ 2002 /3 /15 , 中華民國 台灣 .
  37. Tsung-Chuan Huang, Slo-Li Chu , “A Comprehensive Statement-Based Analysis Systems for Tightly-Coupled Heterogeneous Environments” , 2001 , ISCA 14th International Conference on Parallel And Distributed Computing Systems , 2001 /8 /8 ~ 2001 /8 /10 , United States .
  38. Slo-Li Chu, Tsung-Chuan Huang, Lan-Chi Lee , “Improving workload balance and code optimization in processor-in-memory systems” , 2001 , Eighth International Conference on Parallel and Distributed Systems , 2001 /6 /26 ~ 2001 /6 /29 , Republic of Korea .
  39. Tsung-Chuan Huang, Slo-Li Chu , “A Parallelizing Framework for Intelligent Memory Architectures” , 2001 , Seventh Workshop on Compiler Techniques for High-Performance Computing , 2001 /3 /15 ~ 2001 /3 /16 , 中華民國 台灣 .
  40. Tsung-Chuan Huang, Slo-Li Chu , “A New Analyzing Approach for Intelligent Memory Systems” , 2001 , ISCA 16th International Conference on Computers and Their Applications , 2001 /3 /28 ~ 2001 /3 /30 , United States .
  41. Tsung-Chuan Huang, Slo-Li Chu , “SAGE: A New Analysis and Optimization System for FlexRAM Architecture” , 2000 , 2nd International Workshop on Intelligent Memory Systems , 2000 /11 /12 ~ 2000 /11 /12 , United States .
專利
  1. Hideo Yokota; Kuniya Abe; Ming-Dar Tsai; Slo-Li Chu; Yuan-Hsiang Chang , “Method and Apparatus for Predicting Cell Reprogramming” , 發明 , 2021 , 美國 , 11,138,737 (2021.10) .